WESTPULSE

Hello, I'm Rinse Wester, founder of Westpulse. I have a background in electrical engineering and computer science and a PhD from the University of Twente on design methodologies for FPGAs. Additionally, I have a strong affinity with model-based design delivering results using the right abstraction... FPGA hardware design, for both Altera and Xilinx FPGAs. Delivering solutions for digital signal processing and parallel computation.

VAT numbers: 153613178B01