SEE LAB

The vast strides made by the machine learning community over the past decade have been enabled by equally significant advances in the design of new hardware architectures which can provide the computational speed and memory needed to run state-of-the-art learning algorithms. SEE Lab's hardware team continues to push this frontier by developing novel hardware accelerators targeting both general purpose machine learning and specialized algorithms based on HD computing. research in SEE Lab focuses on three main hardware platforms: "field-programmable gate-arrays" (FPGAs), GPUs and "processing in memory" (PIM) architectures. Our work targets all levels of the design process, from developing new APIs which allow programmers to rapidly prototype ideas on FPGAs and GPUs, to developing novel techniques for floating point operations in PIM. PIM is a promising approach that will remove a bottleneck in data transfer between memory and a centralized processor, enabling massively parallel..

Primary location: La Jolla United States