SPSOC MALAYSIA

Nuzulan Naim Zulkipli*1, Ahmad Zuri Sha'ameri2, Zulfakar Aspar3 and GhazaliHussin41, 2, 3 Faculty of Electrical Engineering, Universiti Teknologi Malaysia, Johor, MALAYSIA.(E-mail: nnaimzulkipli@gmail.com, ahmadzuri@utm.my, zulfakar@utm.my)3 Keysight Technologies Malaysia Sdn. Bhd, Bayan Lepas, Penang, MALAYSIA(E-mail: ghazali_hussin@keysight.com)ABSTRACTError in RF power measurement is due to both additive white Gaussian noise (AWGN) and1/f noise. Thus, the objective of this study is to implement a radio frequency powermeasurement processor on a field programmable gate array (FPGA) to minimize the noisein the signal and improve power measurement accuracy. The processor consists of fivemain modules which are whitening, wavelet decomposition, denoising, signal recovery andpower estimation. The justification for implementation on FPGA is it provides flexibility,reprogrammability and high rate of throughput by exploiting bit parallelism and pipeliningtechniques. The resulting waveforms,..