VAREON
Updated 51 days ago
VAREON designs IP (Intellectual Property) cores on the RTL level, ready to be integrated into our customers' ASIC/FPGA projects...
In addition to our existing IP cores, we also offer "IP Options", where we design new IP cores according to customer's specs while the customer is given a period of time to decide whether to exercise the 'option' to acquire the IP, based on predetermined prices/terms, or to opt out with no obligations.