1 PIN INTERFACE

''Note:'' The 1 Pin Interface is not designed to compete with Chipscope or Signaltap type products which operate at a very low 'logic analyser' level on individual signals. The 1 Pin Interface is designed to operate at a much higher functional level driving control and reading status registers... * ''Burst Target Write and Read access''. The 1 Pin Interface is not meant to be a high data rate interface but the single word access can be pretty slow. Burst Write and Read functionality exists in the interface, we are working on example code to demonstrate how this can be driven.

Primary location: United Kingdom